#Top Module Name
set macroname "postRoute_skew64_sink12_derate"
#Verilog file name without the '.v' at the end
set filename "postRoute_skew64_sink12_derate"
#Name of the .lib/.db to test timing
set Lib "nvstd_tsmc28hp_sv.slow"
#Set clock period
set Period 0.5
#Set early timing derate factor
set Early 0.8
#Set late timing derate factor
set Late 1.07

#set search path to find timing libraries .lib/.db
set search_path [list . /home/libs/syn.A01]

#set specific link path to the .lib/.db. Linking will greatly decrease the time it takes to load and read the library. .lib files
#take much longer to read than .db files
set link_path [list /home/libs/syn.A01/${Lib}.db]

#read verilog file
read_verilog ./RTL/${filename}.v

#read timing library. change command to "read_lib" if it is a .lib file
read_db /home/libs/rc12_timing/std_cell/nvstd/syn.A01/${Lib}.db

#link design to timing library 
link_design 

#read the parasitics file .spef. This file is generated by place and route tools. If you are closing time pre-place and route layout, then comment out this line
read_parasitics -format SPEF ./RTL/${filename}.spef


set_units -time ns -capacitance pF -current mA -voltage V -resistance kOhm

#set the current design to be tested
current_design ${macroname}

#set operating conditions. Usually, there is one condition per .lib/.db file (so you will have to read the .lib file to know what the condition is). Here, the condition in the library is 'typ'
set_operating_conditions -analysis_type on_chip_variation  -library [get_libs \
 {${Lib}.db:${Lib}}]  -min typ  -max \
 typ 

create_clock clk1  -name clk1 -period 1 -waveform {0.05 0.5 }
create_clock clk2  -name clk2 -period 1 -waveform { 0.55 1 }

#if design has no clock tree, comment the following propagated_clock commands
#set_propagated_clock clk1
#set_propagated_clock clk2

set_clock_uncertainty  0.022 [get_clocks {clk1}]
set_clock_uncertainty  0.022 [get_clocks {clk2}]

#set following 7 lines if design latch based
#set_max_time_borrow 0.4 [all_clocks]
#set_max_delay 0.5 -from [get_clocks clk1] -to [get_clocks clk2]
#set_max_delay 0.5 -from [get_clocks clk2] -to [get_clocks clk1]
#set_max_delay 1 -from [get_clocks clk1] -to [get_clocks clk1]
#set_max_delay 1 -from [get_clocks clk2] -to [get_clocks clk2]
#set_max_delay 0.5 -from [all_inputs] -to [get_clocks clk1]
#set_max_delay 0.5 -from [get_clocks clk1] -to [all_outputs]

# External Delay Information
###############################################################################
#make sure you understand what these external delays do to timing before you set them
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[63]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[62]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[61]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[60]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[59]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[58]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[57]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[56]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[55]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[54]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[53]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[52]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[51]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[50]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[49]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[48]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[47]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[46]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[45]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[44]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[43]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[42]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[41]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[40]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[39]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[38]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[37]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[36]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[35]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[34]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[33]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[32]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[31]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[30]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[29]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[28]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[27]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[26]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[25]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[24]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[23]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[22]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[21]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[20]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[19]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[18]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[17]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[16]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[15]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[14]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[13]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[12]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[11]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[10]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[9]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[8]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[7]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[6]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[5]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[4]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[3]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[2]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[1]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_a[0]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[63]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[62]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[61]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[60]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[59]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[58]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[57]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[56]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[55]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[54]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[53]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[52]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[51]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[50]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[49]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[48]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[47]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[46]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[45]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[44]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[43]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[42]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[41]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[40]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[39]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[38]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[37]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[36]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[35]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[34]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[33]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[32]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[31]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[30]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[29]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[28]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[27]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[26]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[25]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[24]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[23]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[22]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[21]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[20]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[19]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[18]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[17]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[16]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[15]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[14]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[13]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[12]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[11]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[10]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[9]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[8]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[7]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[6]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[5]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[4]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[3]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[2]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[1]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_b[0]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[63]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[62]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[61]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[60]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[59]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[58]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[57]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[56]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[55]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[54]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[53]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[52]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[51]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[50]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[49]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[48]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[47]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[46]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[45]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[44]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[43]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[42]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[41]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[40]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[39]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[38]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[37]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[36]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[35]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[34]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[33]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[32]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[31]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[30]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[29]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[28]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[27]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[26]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[25]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[24]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[23]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[22]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[21]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[20]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[19]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[18]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[17]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[16]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[15]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[14]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[13]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[12]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[11]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[10]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[9]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[8]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[7]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[6]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[5]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[4]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[3]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[2]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[1]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_c[0]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_rnd[2]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_rnd[1]}]
set_input_delay 0.03 -clock [get_clocks {clk2}] [get_ports {inst_rnd[0]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[63]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[62]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[61]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[60]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[59]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[58]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[57]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[56]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[55]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[54]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[53]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[52]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[51]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[50]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[49]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[48]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[47]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[46]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[45]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[44]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[43]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[42]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[41]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[40]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[39]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[38]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[37]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[36]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[35]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[34]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[33]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[32]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[31]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[30]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[29]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[28]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[27]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[26]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[25]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[24]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[23]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[22]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[21]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[20]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[19]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[18]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[17]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[16]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[15]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[14]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[13]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[12]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[11]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[10]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[9]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[8]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[7]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[6]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[5]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[4]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[3]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[2]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[1]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {z_inst[0]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[7]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[6]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[5]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[4]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[3]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[2]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[1]}]
set_output_delay 0.05 -clock [get_clocks {clk2}] [get_ports {status_inst[0]}]

#setting the following lines don't actually 'constrain' your design in this step, but are helpful to final output reporting
set_wire_load_mode enclosed
set_max_area 0
set_max_fanout  12 [current_design]
set_max_transition  0.25 [current_design]

#make sure you know the properties of your driving cell before setting
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[63]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[63]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[63]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[63]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[62]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[62]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[62]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[62]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[61]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[61]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[61]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[61]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[60]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[60]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[60]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[60]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[59]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[59]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[59]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[59]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[58]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[58]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[58]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[58]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[57]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[57]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[57]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[57]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[56]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[56]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[56]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[56]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[55]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[55]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[55]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[55]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[54]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[54]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[54]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[54]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[53]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[53]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[53]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[53]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[52]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[52]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[52]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[52]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[51]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[51]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[51]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[51]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[50]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[50]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[50]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[50]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[49]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[49]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[49]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[49]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[48]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[48]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[48]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[48]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[47]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[47]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[47]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[47]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[46]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[46]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[46]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[46]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[45]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[45]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[45]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[45]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[44]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[44]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[44]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[44]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[43]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[43]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[43]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[43]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[42]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[42]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[42]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[42]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[41]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[41]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[41]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[41]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[40]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[40]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[40]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[40]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[39]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[39]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[39]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[39]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[38]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[38]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[38]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[38]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[37]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[37]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[37]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[37]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[36]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[36]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[36]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[36]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[35]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[35]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[35]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[35]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[34]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[34]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[34]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[34]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[33]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[33]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[33]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[33]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[32]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[32]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[32]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[32]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[31]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[31]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[31]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[31]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[30]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[30]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[30]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[30]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[29]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[29]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[29]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[29]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[28]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[28]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[28]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[28]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[27]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[27]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[27]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[27]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[26]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[26]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[26]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[26]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[25]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[25]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[25]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[25]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[24]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[24]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[24]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[24]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[23]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[23]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[23]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[23]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[22]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[22]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[22]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[22]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[21]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[21]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[21]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[21]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[20]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[20]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[20]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[20]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[19]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[19]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[19]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[19]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[18]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[18]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[18]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[18]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[17]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[17]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[17]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[17]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[16]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[16]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[16]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[16]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[15]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[15]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[15]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[15]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[14]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[14]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[14]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[14]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[13]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[13]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[13]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[13]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[12]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[12]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[12]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[12]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[11]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[11]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[11]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[11]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[10]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[10]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[10]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[10]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[9]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[9]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[9]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[9]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[8]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[8]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[8]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[8]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[7]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[7]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[7]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[7]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[6]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[6]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[6]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[6]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[5]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[5]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[5]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[5]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[4]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[4]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[4]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[4]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[3]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[3]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[3]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[3]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[2]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[2]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[2]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[2]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[1]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[1]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[1]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[1]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[0]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[0]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[0]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_a[0]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[63]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[63]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[63]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[63]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[62]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[62]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[62]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[62]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[61]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[61]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[61]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[61]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[60]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[60]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[60]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[60]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[59]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[59]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[59]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[59]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[58]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[58]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[58]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[58]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[57]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[57]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[57]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[57]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[56]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[56]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[56]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[56]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[55]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[55]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[55]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[55]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[54]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[54]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[54]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[54]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[53]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[53]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[53]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[53]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[52]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[52]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[52]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[52]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[51]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[51]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[51]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[51]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[50]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[50]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[50]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[50]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[49]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[49]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[49]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[49]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[48]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[48]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[48]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[48]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[47]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[47]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[47]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[47]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[46]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[46]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[46]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[46]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[45]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[45]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[45]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[45]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[44]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[44]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[44]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[44]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[43]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[43]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[43]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[43]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[42]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[42]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[42]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[42]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[41]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[41]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[41]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[41]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[40]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[40]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[40]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[40]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[39]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[39]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[39]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[39]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[38]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[38]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[38]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[38]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[37]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[37]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[37]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[37]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[36]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[36]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[36]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[36]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[35]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[35]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[35]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[35]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[34]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[34]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[34]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[34]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[33]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[33]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[33]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[33]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[32]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[32]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[32]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[32]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[31]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[31]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[31]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[31]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[30]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[30]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[30]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[30]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[29]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[29]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[29]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[29]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[28]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[28]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[28]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[28]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[27]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[27]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[27]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[27]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[26]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[26]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[26]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[26]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[25]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[25]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[25]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[25]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[24]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[24]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[24]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[24]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[23]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[23]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[23]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[23]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[22]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[22]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[22]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[22]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[21]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[21]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[21]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[21]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[20]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[20]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[20]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[20]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[19]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[19]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[19]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[19]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[18]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[18]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[18]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[18]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[17]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[17]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[17]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[17]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[16]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[16]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[16]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[16]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[15]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[15]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[15]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[15]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[14]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[14]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[14]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[14]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[13]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[13]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[13]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[13]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[12]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[12]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[12]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[12]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[11]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[11]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[11]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[11]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[10]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[10]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[10]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[10]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[9]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[9]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[9]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[9]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[8]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[8]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[8]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[8]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[7]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[7]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[7]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[7]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[6]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[6]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[6]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[6]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[5]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[5]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[5]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[5]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[4]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[4]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[4]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[4]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[3]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[3]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[3]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[3]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[2]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[2]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[2]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[2]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[1]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[1]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[1]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[1]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[0]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[0]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[0]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_b[0]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[63]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[63]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[63]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[63]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[62]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[62]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[62]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[62]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[61]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[61]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[61]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[61]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[60]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[60]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[60]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[60]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[59]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[59]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[59]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[59]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[58]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[58]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[58]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[58]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[57]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[57]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[57]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[57]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[56]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[56]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[56]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[56]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[55]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[55]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[55]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[55]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[54]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[54]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[54]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[54]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[53]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[53]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[53]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[53]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[52]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[52]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[52]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[52]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[51]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[51]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[51]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[51]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[50]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[50]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[50]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[50]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[49]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[49]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[49]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[49]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[48]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[48]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[48]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[48]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[47]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[47]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[47]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[47]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[46]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[46]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[46]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[46]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[45]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[45]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[45]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[45]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[44]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[44]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[44]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[44]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[43]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[43]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[43]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[43]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[42]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[42]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[42]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[42]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[41]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[41]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[41]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[41]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[40]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[40]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[40]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[40]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[39]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[39]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[39]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[39]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[38]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[38]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[38]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[38]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[37]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[37]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[37]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[37]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[36]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[36]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[36]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[36]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[35]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[35]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[35]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[35]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[34]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[34]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[34]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[34]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[33]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[33]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[33]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[33]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[32]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[32]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[32]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[32]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[31]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[31]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[31]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[31]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[30]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[30]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[30]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[30]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[29]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[29]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[29]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[29]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[28]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[28]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[28]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[28]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[27]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[27]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[27]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[27]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[26]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[26]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[26]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[26]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[25]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[25]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[25]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[25]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[24]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[24]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[24]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[24]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[23]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[23]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[23]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[23]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[22]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[22]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[22]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[22]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[21]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[21]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[21]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[21]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[20]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[20]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[20]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[20]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[19]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[19]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[19]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[19]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[18]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[18]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[18]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[18]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[17]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[17]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[17]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[17]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[16]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[16]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[16]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[16]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[15]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[15]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[15]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[15]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[14]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[14]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[14]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[14]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[13]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[13]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[13]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[13]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[12]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[12]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[12]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[12]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[11]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[11]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[11]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[11]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[10]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[10]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[10]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[10]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[9]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[9]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[9]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[9]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[8]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[8]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[8]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[8]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[7]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[7]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[7]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[7]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[6]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[6]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[6]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[6]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[5]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[5]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[5]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[5]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[4]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[4]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[4]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[4]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[3]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[3]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[3]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[3]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[2]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[2]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[2]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[2]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[1]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[1]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[1]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[1]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[0]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[0]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[0]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_c[0]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[2]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[2]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[2]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[2]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[1]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[1]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[1]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[1]}]
set_driving_cell -rise -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[0]}]
set_driving_cell -fall -min -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[0]}]
set_driving_cell -rise -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[0]}]
set_driving_cell -fall -max -no_design_rule -lib_cell ND2D2 -pin ZN [get_ports \
 {inst_rnd[0]}]
 
#make sure the output load you are setting is reasonable. Make sure you know what the units are (look at set_units command)
set_load -pin_load  0.05 [get_ports {status_inst[5]}]
set_load -pin_load  0.05 [get_ports {z_inst[27]}]
set_load -pin_load  0.05 [get_ports {z_inst[1]}]
set_load -pin_load  0.05 [get_ports {z_inst[24]}]
set_load -pin_load  0.05 [get_ports {z_inst[41]}]
set_load -pin_load  0.05 [get_ports {status_inst[2]}]
set_load -pin_load  0.05 [get_ports {z_inst[18]}]
set_load -pin_load  0.05 [get_ports {z_inst[49]}]
set_load -pin_load  0.05 [get_ports {z_inst[15]}]
set_load -pin_load  0.05 [get_ports {z_inst[36]}]
set_load -pin_load  0.05 [get_ports {status_inst[6]}]
set_load -pin_load  0.05 [get_ports {z_inst[26]}]
set_load -pin_load  0.05 [get_ports {z_inst[56]}]
set_load -pin_load  0.05 [get_ports {z_inst[45]}]
set_load -pin_load  0.05 [get_ports {z_inst[46]}]
set_load -pin_load  0.05 [get_ports {z_inst[35]}]
set_load -pin_load  0.05 [get_ports {z_inst[9]}]
set_load -pin_load  0.05 [get_ports {z_inst[29]}]
set_load -pin_load  0.05 [get_ports {z_inst[61]}]
set_load -pin_load  0.05 [get_ports {z_inst[51]}]
set_load -pin_load  0.05 [get_ports {z_inst[59]}]
set_load -pin_load  0.05 [get_ports {z_inst[38]}]
set_load -pin_load  0.05 [get_ports {z_inst[20]}]
set_load -pin_load  0.05 [get_ports {z_inst[39]}]
set_load -pin_load  0.05 [get_ports {z_inst[62]}]
set_load -pin_load  0.05 [get_ports {z_inst[52]}]
set_load -pin_load  0.05 [get_ports {z_inst[30]}]
set_load -pin_load  0.05 [get_ports {status_inst[1]}]
set_load -pin_load  0.05 [get_ports {z_inst[53]}]
set_load -pin_load  0.05 [get_ports {z_inst[31]}]
set_load -pin_load  0.05 [get_ports {z_inst[14]}]
set_load -pin_load  0.05 [get_ports {z_inst[32]}]
set_load -pin_load  0.05 [get_ports {z_inst[58]}]
set_load -pin_load  0.05 [get_ports {z_inst[17]}]
set_load -pin_load  0.05 [get_ports {z_inst[47]}]
set_load -pin_load  0.05 [get_ports {z_inst[10]}]
set_load -pin_load  0.05 [get_ports {z_inst[43]}]
set_load -pin_load  0.05 [get_ports {z_inst[40]}]
set_load -pin_load  0.05 [get_ports {z_inst[2]}]
set_load -pin_load  0.05 [get_ports {z_inst[50]}]
set_load -pin_load  0.05 [get_ports {z_inst[13]}]
set_load -pin_load  0.05 [get_ports {z_inst[12]}]
set_load -pin_load  0.05 [get_ports {z_inst[23]}]
set_load -pin_load  0.05 [get_ports {z_inst[37]}]
set_load -pin_load  0.05 [get_ports {z_inst[57]}]
set_load -pin_load  0.05 [get_ports {z_inst[0]}]
set_load -pin_load  0.05 [get_ports {status_inst[0]}]
set_load -pin_load  0.05 [get_ports {z_inst[3]}]
set_load -pin_load  0.05 [get_ports {z_inst[5]}]
set_load -pin_load  0.05 [get_ports {z_inst[34]}]
set_load -pin_load  0.05 [get_ports {z_inst[54]}]
set_load -pin_load  0.05 [get_ports {z_inst[16]}]
set_load -pin_load  0.05 [get_ports {status_inst[4]}]
set_load -pin_load  0.05 [get_ports {z_inst[55]}]
set_load -pin_load  0.05 [get_ports {z_inst[33]}]
set_load -pin_load  0.05 [get_ports {z_inst[11]}]
set_load -pin_load  0.05 [get_ports {z_inst[48]}]
set_load -pin_load  0.05 [get_ports {status_inst[7]}]
set_load -pin_load  0.05 [get_ports {z_inst[60]}]
set_load -pin_load  0.05 [get_ports {z_inst[42]}]
set_load -pin_load  0.05 [get_ports {z_inst[6]}]
set_load -pin_load  0.05 [get_ports {z_inst[4]}]
set_load -pin_load  0.05 [get_ports {z_inst[25]}]
set_load -pin_load  0.05 [get_ports {status_inst[3]}]
set_load -pin_load  0.05 [get_ports {z_inst[28]}]
set_load -pin_load  0.05 [get_ports {z_inst[63]}]
set_load -pin_load  0.05 [get_ports {z_inst[22]}]
set_load -pin_load  0.05 [get_ports {z_inst[7]}]
set_load -pin_load  0.05 [get_ports {z_inst[19]}]
set_load -pin_load  0.05 [get_ports {z_inst[21]}]
set_load -pin_load  0.05 [get_ports {z_inst[44]}]
set_load -pin_load  0.05 [get_ports {z_inst[8]}]

#timing derates for setup and hold time
set_timing_derate -early -cell_delay ${Early}
set_timing_derate -late -cell_delay ${Late}
check_timing

#report timing commands
report_constraint -all_violators -significant_digits 4 > constraints.${Lib}.${filename}.rpt
report_reference > reference.${Lib}.${filename}.rpt
report_timing -delay_type max -nworst 999 -significant_digits 4 -from [all_registers] -to [all_registers] > setup.reg2reg.${Lib}.${filename}.rpt
report_timing -delay_type max -nworst 999 -significant_digits 4 -from [all_registers] -to [all_outputs] > setup.reg2out.${Lib}.${filename}.rpt
report_timing -delay_type max -nworst 999 -significant_digits 4 -from [all_inputs] -to [all_registers] > setup.in2reg.${Lib}.${filename}.rpt
report_timing -delay_type min -nworst 9999 -significant_digits 4 -from [all_registers -clock_pins] -to [all_registers -data_pins] > hold.reg2reg.${Lib}.${filename}.rpt
report_timing -delay_type min -nworst 9999 -significant_digits 4 -from [all_registers -clock_pins] -to [all_outputs] > hold.reg2out.${Lib}.${filename}.rpt
report_timing -delay_type min -nworst 9999 -significant_digits 4 -from [all_inputs] -to [all_registers -data_pins] > hold.in2reg.${Lib}.${filename}.rpt
report_design > design.${Lib}.${filename}.rpt
report_disable_timing > disabledarcs.${Lib}.${filename}.rpt

report_timing -delay_type max -nworst 999 -significant_digits 4 > setup.${Lib}.${filename}.rpt
report_timing -delay_type min -nworst 9999 -significant_digits 4 > hold.${Lib}.${filename}.rpt

quit

